Recently, due to progression of high density mount technology in a semiconductor field, area mount technology tends to be used instead of conventional surface mount technology. New packages such as BGA (Ball Grid Array) and CSP (Chip Scale Package) have been developed and they are widely used. Further, speeding up of information transfer also progresses. For these reasons, a rigid board for an interposer is attracting attention than before. Therefore, development of a rigid board having characteristics such as high thermal resistance, low thermal expansivity and low permittivity is strongly demanded.
High density mounting of electronic parts as well as high density integration thereof progress according to the demand of high functionalization of electronic devices or apparatuses. Further, downsizing and miniaturization, and high density integration of semiconductor multilayered circuit boards are also progressing than before in response to the demand of the high density integration of the electronic parts. A build-up multilayered circuit board is widely used in order to respond to the demand of the high density integration of the semiconductor multilayered circuit boards.
Further, in order to make the semiconductor multilayered circuit boards further thinner and to allow them to process signals in high speed, a multilayered circuit board in which conductor circuit layers and insulator layers are single-side laminated alternately (see FIG. 2) is proposed, instead of a conventional build-up multilayered circuit board (see FIG. 1). Further, such a multilayered circuit board does not include a core substrate having via-holes formed therethrough and vias for providing electrical connection through the via-holes. Furthermore, inner pads are formed on one surface of the multilayered circuit board and outer pads are formed on the other surface thereof (see, e.g., patent document 1: Japanese Patent Application Laid-open No. 2000-323613).
However, since the conductor circuit layers and the insulator layers are single-side laminated together, in the case where conventional insulator layers are used as the insulator layers, there is a problem in that the multilayered circuit board largely warps in a manufacturing process thereof. This is because a modulus of elasticity of each conventional insulator layer is lowered by making it thinner and coefficients of thermal expansion of each conductor layer and each conventional insulator layer are different from each other.
In order to suppress occurrence of the warp of the multilayered circuit board, the following method is considered (see, e.g., patent document 2: WO 2003/039219). In such a method, two metal plates are united together to form a composite metal plate, and conductor circuit layers and insulator layers are laminated alternately on each of the both surfaces of the composite metal plate. Thereafter, the composite metal plate is separated into the two metal plates each having a laminated structure including the conductor circuit layers and the insulator layers, and then each metal plate is subjected to an etching treatment to remove the metal plate, thereby forming two or more multilayered circuit boards. In this way, the multilayered circuit boards can be obtained. However, even in the case where such a method is used, the above problem cannot be sufficiently solved.